1. Field of the Invention
This invention relates to a microprocessor including a cache memory therein, and more particularly so a microprocessor incorporating cache memory having a construction for efficiently executing a purge operation for purging a predetermined page divided for data stored in the cache memory.
2. Description of the Prior Art
In a conventional microprocessor including a cache memory, the cache memory has a method for purging only the whole information stored in the cache memory when a purge operation for information stored thereof is required.
Namely, only a part of the information stored in the cache memory can not be purged by the conventional cache memory. This type of cache memory therefore can be fully applicable into the microprocessor incorporating a small amount of the cache memory, for example having not more than 4K bytes. However, the conventional method can not be fully used in today's microprocessor including a cache memory having a large amount of capacity or scale.
For example, in the microprocessor incorporating with a larger scale cache memory, the whole information stored in the cache memory must be purged even when a purge operation for the part of the information is required.
Accordingly, the efficiency of the purge operation for the cache memory is low.
In other words, part of the information stored in the cache memory can not be deleted by using the ability of the conventional microprocessor. Namely, the conventional microprocessor can not execute any operation for purging a part of the cache memory.
Therefore when the purging operation for a part of the information is required, the operating efficiency of the entire microprocessor is decreased.